VTR 8: High-performance CAD and customizable FPGA architecture modelling
Developing Field-programmable Gate Array (FPGA) architectures is challenging due to the
competing requirements of various application domains and changing manufacturing …
competing requirements of various application domains and changing manufacturing …
VTR 7.0: Next generation architecture and CAD system for FPGAs
Exploring architectures for large, modern FPGAs requires sophisticated software that can
model and target hypothetical devices. Furthermore, research into new CAD algorithms …
model and target hypothetical devices. Furthermore, research into new CAD algorithms …
Reconfigurable computing architectures
Reconfigurable architectures can bring unique capabilities to computational tasks. They
offer the performance and energy efficiency of hardware with the flexibility of software. In …
offer the performance and energy efficiency of hardware with the flexibility of software. In …
Odin ii-an open-source verilog hdl synthesis tool for cad research
P Jamieson, KB Kent, F Gharibian… - 2010 18th IEEE …, 2010 - ieeexplore.ieee.org
In this work, we present Odin II, a framework for Verilog Hardware Description Language
(HDL) synthesis that allows researchers to investigate approaches/improvements to different …
(HDL) synthesis that allows researchers to investigate approaches/improvements to different …
Unsupervised co-segmentation through region matching
JC Rubio, J Serrat, A López… - 2012 IEEE Conference …, 2012 - ieeexplore.ieee.org
Co-segmentation is defined as jointly partitioning multiple images depicting the same or
similar object, into foreground and background. Our method consists of a multiple-scale …
similar object, into foreground and background. Our method consists of a multiple-scale …
Managing and accessing data in the cloud: Privacy risks and approaches
SDC di Vimercati, S Foresti… - 2012 7th International …, 2012 - ieeexplore.ieee.org
Ensuring proper privacy and protection of the information stored, communicated, processed,
and disseminated in the cloud as well as of the users accessing such an information is one …
and disseminated in the cloud as well as of the users accessing such an information is one …
[图书][B] Tree-based heterogeneous FPGA architectures: application specific exploration and optimization
This book presents a new FPGA architecture known as tree-based FPGA architecture, due to
its hierarchical nature. This type of architecture has been relatively unexplored despite their …
its hierarchical nature. This type of architecture has been relatively unexplored despite their …
Coupling and cohesion as modularization drivers: Are we being over-persuaded?
FB e Abreu, M Goulao - Proceedings Fifth European …, 2001 - ieeexplore.ieee.org
For around three decades software engineering gurus have" sold" us the ideal of minimal
coupling and maximal cohesion at all levels of abstraction as a way to reduce the effort to …
coupling and maximal cohesion at all levels of abstraction as a way to reduce the effort to …
Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect
The development of future FPGA fabrics with more sophisticated and complex logic blocks
requires a new CAD flow that permits the expression of that complexity and the ability to …
requires a new CAD flow that permits the expression of that complexity and the ability to …
FlowTune: End-to-end automatic logic optimization exploration via domain-specific multiarmed bandit
Design flows are the explicit combinations of design transformations, primarily involved in
synthesis, placement, and routing processes, to accomplish the design of integrated circuits …
synthesis, placement, and routing processes, to accomplish the design of integrated circuits …