The championship simulator: Architectural simulation for education and competition

N Gober, G Chacon, L Wang, PV Gratz… - arXiv preprint arXiv …, 2022 - arxiv.org
Recent years have seen a dramatic increase in the microarchitectural complexity of
processors. This increase in complexity presents a twofold challenge for the field of …

Aqua: Scalable rowhammer mitigation by quarantining aggressor rows at runtime

A Saxena, G Saileshwar, PJ Nair… - 2022 55th IEEE/ACM …, 2022 - ieeexplore.ieee.org
Rowhammer allows an attacker to induce bit flips in a row by rapidly accessing neighboring
rows. Rowhammer is a severe security threat as it can be used to escalate privilege or break …

Moesi-prime: preventing coherence-induced hammering in commodity workloads

K Loughlin, S Saroiu, A Wolman, YA Manerkar… - Proceedings of the 49th …, 2022 - dl.acm.org
Prior work shows that Rowhammer attacks---which flip bits in DRAM via frequent activations
of the same row (s)---are viable. Adversaries typically mount these attacks via instruction …

{CXL-ANNS}:{Software-Hardware} collaborative memory disaggregation and computation for {Billion-Scale} approximate nearest neighbor search

J Jang, H Choi, H Bae, S Lee, M Kwon… - 2023 USENIX Annual …, 2023 - usenix.org
We propose CXL-ANNS, a software-hardware collaborative approach to enable highly
scalable approximate nearest neighbor search (ANNS) services. To this end, we first …

Lukewarm serverless functions: characterization and optimization

D Schall, A Margaritov, D Ustiugov… - Proceedings of the 49th …, 2022 - dl.acm.org
Serverless computing has emerged as a widely-used paradigm for running services in the
cloud. In serverless, developers organize their applications as a set of functions, which are …

Casper: Accelerating stencil computations using near-cache processing

A Denzler, GF Oliveira, N Hajinazar, R Bera… - IEEE …, 2023 - ieeexplore.ieee.org
Stencil computations are commonly used in a wide variety of scientific applications, ranging
from large-scale weather prediction to solving partial differential equations. Stencil …

{SecSMT}: Securing {SMT} processors against {Contention-Based} covert channels

M Taram, X Ren, A Venkat, D Tullsen - 31st USENIX Security Symposium …, 2022 - usenix.org
This paper presents the first comprehensive analysis of contention-based security
vulnerabilities in a high-performance simultaneous mulithreaded (SMT) processor. It …

ArchExplorer: Microarchitecture exploration via bottleneck analysis

C Bai, J Huang, X Wei, Y Ma, S Li, H Zheng… - Proceedings of the 56th …, 2023 - dl.acm.org
Design space exploration (DSE) for microarchitecture parameters is an essential stage in
microprocessor design to explore the trade-offs among performance, power, and area …

Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology

B Hyun, T Kim, D Lee, M Rhu - 2024 IEEE International …, 2024 - ieeexplore.ieee.org
Processing-in-memory (PIM) has been explored for decades by computer architects, yet it
has never seen the light of day in real-world products due to its high design overheads and …

PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers

A Jaleel, G Saileshwar, SW Keckler… - 2024 ACM/IEEE 51st …, 2024 - ieeexplore.ieee.org
Rowhammer-induced bit-flips are a threat to DRAM security. To mitigate Rowhammer,
DDR4 devices employ TRR, an in-DRAM tracker, to identify aggressor rows. In-DRAM …