This review paper explores considerations for ultimate CMOS transistor scaling. Transistor
architectures such as extremely thin silicon-on-insulator and FinFET (and related …

The performance of strained silicon (Si) as the channel material for today's metal-oxide-
semiconductor field-effect transistors may be reaching a plateau. New channel materials …

With CMOS scaling reaching physical limits in the next decade, new approaches are
required to enhance the functionality of electronic systems. Reconfigurability on the device …

Germanium is a promising material for future very large scale integration transistors, due to
its superior hole mobility. However, germanium-based devices typically suffer from high …

Integrating high electron mobility III–V materials on an existing Si based CMOS processing
platform is considered as a main stepping stone to increase the CMOS performance and …

Semiconductor devices and methods of forming the same are provided. A template layer is
formed on a substrate, the template layer having a recess therein. A plurality of nanowires is …

We report an experimental study on quasi-one-dimensional Al–Ge–Al nanowire (NW)
heterostructures featuring unmatched photoconductive gains exceeding 107 and …

For the first time, we investigate the temperature effect on AlGaAs/Si based hetero-structure
junctionless double gate tunnel field effect transistor. Since junctionless tunnel FET is an …

The goal of this article is to provide an overview of the state of knowledge regarding the
Atomic Layer Deposition (ALD) of metal oxides on III–V semiconductor surfaces. An …

In this article, we have evaluated the merits of monolithically cointegrated alternate channel
complementary metal-oxide-semiconductor (CMOS) device architecture, utilizing tensile …