Computer-aided design of analog and mixed-signal integrated circuits

GGE Gielen, RA Rutenbar - Proceedings of the IEEE, 2000 - ieeexplore.ieee.org
This survey presents an overview of recent advances in the state of the art for computer-
aided design (CAD) tools for analog and mixed-signal integrated circuits (ICs). Analog …

[图书][B] Principles of testing electronic systems

S Mourad, Y Zorian - 2000 - books.google.com
A pragmatic approach to testing electronic systems As we move ahead in the electronic age,
rapid changes in technology pose an ever-increasing number of challenges in testing …

Analog fault coverage improvement using final-test dynamic part average testing

W Dobbelaere, R Vanhooren, W De Man… - 2016 IEEE …, 2016 - ieeexplore.ieee.org
The growing number of chips in automotive applications has created an increasing urge to
avoid electronic failures in the field. Part Average Testing (PAT) is a generally used …

Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm

S Nakahara, K Higeta, M Kohno… - … (IEEE Cat. No …, 1999 - ieeexplore.ieee.org
This paper presents a built-in self-test (BIST) scheme, which consists of a flexible pattern
generator and a practical on-macro two-dimensional redundancy analyzer, for GHz …

Reducing overprovision of triple modular reduncancy owing to approximate computing

B Deveautour, M Traiola, A Virazel… - 2021 IEEE 27th …, 2021 - ieeexplore.ieee.org
Until recently, Approximate Computing (AxC) was considered to be a trend topic mainly for
resilient applications. Its use aimed at reducing area and power consumption of Integrated …

An SRAM weak cell fault model and a DFT technique with a programmable detection threshold

A Pavlov, M Sachdev… - … International Conferce on …, 2004 - ieeexplore.ieee.org
SRAM cell stability has become an important design and test issue owing to significant
process spreads, non-ideal operational conditions, and subtle manufacturing defects in …

[图书][B] Design and test of embedded SRAMs

AS Pavlov - 2005 - collectionscanada.gc.ca
Embedded SRAMs can occupy the majority of the chip area in SoCs. The increased process
spreads of modern scaled-down technologies and non-catastrophic defect-related sensitivity …

Testing single via related defects in digital VLSI designs

N Mirabella, M Ricci, I Calà, R Lanza… - Microelectronics …, 2021 - Elsevier
In integrated circuit designs, the conductive connections between different layers are known
as vias or cuts. Such structures are critical for digital circuit manufacturing, as they represent …

Test and reliability of approximate hardware

M Traiola, B Deveautour, A Bosio, P Girard… - Approximate …, 2022 - Springer
The undeniable need of energy efficiency in today's devices is leading to the adoption of
innovative computing paradigms—such as Approximate Computing. As this paradigm is …

DefSim: A remote laboratory for studying physical defects in CMOS digital circuits

WA Pleskacz, V Stopjakova, T Borejko… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
This paper describes a unique remote laboratory for studying CMOS physical defects that is
meant to be used in advanced courses in the scope of microelectronic design and test. Both …