I/sub DDQ/testing and defect classes-A tutorial

JM Soden, CF Hawkins - … of the IEEE 1995 Custom Integrated …, 1995 - ieeexplore.ieee.org
I/sub DDQ/testing of CMOS ICs is a technique for production quality and reliability
improvement, design validation, and failure analysis. The origin and basic concepts of I/sub …

IDDQ testing: state of the art and future trends

A Ferré, E Isern, J Rius, R Rodrı́guez-Montañés… - Integration, 1998 - Elsevier
Quality assurance in electronic components and systems requires effective test strategies to
be applied to ICs of increasing complexity and size. The traditional voltage techniques …

A practical current sensing technique for I/sub DDQ/testing

JJ Tang, KJ Lee, BD Liu - … on Very Large Scale Integration (VLSI …, 1995 - ieeexplore.ieee.org
In this paper, a practical design for built-in current sensors (BICS's) is proposed. This
scheme can execute current testing during the normal circuit operation with very small …

Scan testing of micropipelines

OA Petlin, SB Furber - Proceedings 13th IEEE VLSI Test …, 1995 - ieeexplore.ieee.org
The micropipeline approach to designing asynchronous VLSI circuits has successfully been
used in the AMULET1 microprocessor. A method to design and test micropipelines is …

QTAG: a standard for test fixture based I/sub DDQ//I/sub SSQ/monitors

K Baker - Proceedings., International Test Conference, 1995 - ieeexplore.ieee.org
This paper describes the goals and history of the Quality Test Action Group (QTAG) since if
was formed at the 1993 International Test Conference. QTAG was created to provide the …

A built-in current sensor based on current-mode design

KJ Lee, JJ Tang - IEEE Transactions on Circuits and Systems II …, 1998 - ieeexplore.ieee.org
A very simple yet powerful design of a built-in current sensor for CMOS I/sub DDQ/testing is
presented. Compared with previous methods, this design has lower sensitivity to parameter …

A BIST-DFT technique for DC test of analog modules

C Dufaza, H Ihs - Journal of Electronic Testing, 1996 - Springer
Among test techniques for analog circuits, DC test is one of the simplest method for BIST
application since easy to integrate test pattern generator and response analyzer are …

An efficient I/sub DDQ/test generation scheme for bridging faults in CMOS digital circuits

T Chen, IN Hajj, EM Rudnick… - Digest of Papers 1996 …, 1996 - ieeexplore.ieee.org
In a previous work on test generation for I/sub DDQ/bridging faults in CMOS circuits, a
genetic algorithm (GA) based approach targeting the all-pair bridging fault set stored in a …

Off chip monitors and built in current sensors for analogue and mixed signal testing

Y Maidon, Y Deval, H Manhaeve - Proceedings 1998 IEEE …, 1998 - ieeexplore.ieee.org
The aim of this paper is to be part a general survey regarding test methods for analogue and
mixed circuits, using a stimulus on the signal or power supply inputs. The data is extracted …

The use of Iddq testing in low stuck-at coverage situations

PC Maxwell - Proceedings 13th IEEE VLSI Test Symposium, 1995 - ieeexplore.ieee.org
An unresolved issue in IC testing is what mix of coverages of different types of test is
required in order to achieve a given quality goal. This paper investigates the interaction …